VDM_MESSAGE_READ (0x0A4) - VDM_MESSAGE_READ (0x0A4) - 1.0 English - PG344

Versal ACAP DMA and Bridge Subsystem for PCI Express Product Guide (PG344)
Document ID
PG344
Release Date
2022-05-20
Version
1.0 English
Table 1. VDM Message Read (0x0A4)
Bit Default Access Type Field Description
[31:0]   RO VDM message read

Vendor Defined Message (VDM) messages, st_rx_msg_data, are stored in fifo in the example design. A read to this register (0x0A4) will pop out one 32-bit message at a time.