- Supports AXI4 and AXI4-Lite.
- Configurable data width from 8 to 512. The data width must be power of 2.
- ECC calculation for every data byte.
- Single bit error detection and correction, double bit error detection for every data byte.
- Supports both soft and hard reset.
- Configurable outstanding transaction support up to 64-bits for read channel.
- When ECC is applied, the value of the data width doubles.
- In case of a single-bit error, the bit is corrected along with the correction being notified.
- Supports Two Types of ECC modes: Hamming and HSIAO.
- Error Injection(Single and Double bit error).
- Slave error response incase of Error detection.
- Error Start address capturing in registers.
- Provides error count for both single and double bit errors.