General Tab - 1.0 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.0 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2023-11-01
Version
1.0 English

The General tab of the Customize IP dialog box is shown in the following figure.

Figure 1. General Tab

Number of AXI Stream Slave Interfaces
This is the number of NoC ingress (NMU) ports.
Number of AXI Stream Master Interfaces
This is the number of NoC egress (NSU) ports.
Number of AXI Clocks
This is the number of AXI clocks that will be used across the set of NMU and NSU ports. The association of clock signal with AXI port is made on the Inputs and Outputs tabs.
Number of Inter-NoC Stream Slave Interfaces
This is the number of Inter-NoC ingress ports.
Number of Inter-NoC Stream Master Interfaces
This is the number of Inter-NoC egress ports.
TDEST Width (bits)
This is the number of TDEST signal bits used to direct streams to the intended NoC egress (NSU) port.
TID Width (bits)
This is the number of data stream identifier bits that indicate different streams of data.