• Review Versal™ product and system architecture​
• Select target device​
• Identify performance requirements​
• Identify power requirements​
• Identify memory requirements
• Identify I/O requirements​
• Identify boot and configuration requirements
• Identify isolation and security requirements
• Configure isolation and subsystems in ACE
• Review and select PCI Express® and Ethernet protocols​
• Identify additional design requirements

• Create Vivado^TM project
• Create top-level Vivado IP integrator block design including CIPS IP V* 
• Define IO & GT placement, boot mode
• Design IP in RTL or HLS
• Ensure design adheres to coding guidelines
• Constrain the design
• Run synthesis and methodology checks
• Simulate the design to validate functionality
• Review utilization and power against original budget
• Run design through Vivado implementation
• Iterate on design closure
• Perform memory performance tuning
• Review utilization and power against original budget
• Create programmable device image

V* = New and required for Versal designs

PetaLinux Flow^{* *}Superseded by the AMD Embedded Development Framework (EDF). Recommend using the EDF Linux Flows.

• Create new PetaLinux project using DSC from Vivado
• Modify project settings
• Modify Linux kernel settings
• Build entire system including firmware
• Build boot collateral

EDF Linux Flows

• AMD Embedded Development Framework (EDF)
• Custom Hardware Development
• Generate System Device Tree
• Generating a new Yocto Machine Configuration
• Operating System Integration and Development (Image build)
• Customizing the Kernel Configuration
• Editing the RootFS Configuration
• Customizing the Kernel in Your Yocto Build

• Evaluate device capabilities
• Perform schematic entry
• Lay out and simulate the board design
• Prototype, build, and test

• Simulate the design for functionality and early performance assessment
• Iterate on design timing and power closure
• Generate programmable device image (includes PLM firmware) V*
• Perform hardware functional testing
• Validate performance in hardware

V* = New and required for Versal designs