| Register Name | Stream_Switch_Adaptive_Clock_Gate_Abort_Period |
|---|---|
| Offset Address | 0x000003FF38 |
| Absolute Address |
The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000007 |
| Description | Status of Stream Switch Adaptive Clock Gate Abort Period |
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Abort_Period | 3:0 | rwNormal read/write | 0x7 | Abort Period for adaptive clock gate, defined as 2^N. Supported range for field: [3-12]. Giving periods: [8,16,32,.,4096] cycles. Default period: 128 cycles. If Stream_Switch_Adaptive_Clock_Gate is disabled, this field has no effect. Currently, only officially supported period is 128 cycles. |