Stream_Switch_Deterministic_Merge_arb0_ctrl (CORE_MODULE) Register Description

Register NameStream_Switch_Deterministic_Merge_arb0_ctrl
Offset Address0x000003F808
Absolute Address

The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row.

Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionStream Switch Deterministic Merge Arbiter:0 Control

Stream_Switch_Deterministic_Merge_arb0_ctrl (CORE_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Enable 0rwNormal read/write0x0Enable deterministic merge