| Register Name | Tile_Control_Packet_Handler_Status |
|---|---|
| Offset Address | 0x000003FF30 |
| Absolute Address |
The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row. |
| Width | 32 |
| Type | wtcReadable, write a 1 to clear |
| Reset Value | 0x00000000 |
| Description | Status of control packet handling |
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Tlast_Error | 3 | wtcReadable, write a 1 to clear | 0x0 | Sticky bit |
| SLVERR_On_Access | 2 | wtcReadable, write a 1 to clear | 0x0 | Sticky bit |
| Second_Header_Parity_Error | 1 | wtcReadable, write a 1 to clear | 0x0 | Sticky bit |
| First_Header_Parity_Error | 0 | wtcReadable, write a 1 to clear | 0x0 | Sticky bit |