DMA_S2MM_1_Ctrl (MEMORY_MODULE) Register Description

Register NameDMA_S2MM_1_Ctrl
Offset Address0x000001DE08
Absolute Address

The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row.

Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDMA Control Register S2MM Ch1

DMA_S2MM_1_Ctrl (MEMORY_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
FoT_Mode17:16rwNormal read/write0x0Finish on TLAST mode. 00 = FoT_disabled; 01 = FoT_no_counts; 10 = FoT_counts_with_task_tokens; 11 = FoT_counts_from_mm_register
Controller_ID15:8rwNormal read/write0x0Task-complete-token controller ID field
Decompression_Enable 4rwNormal read/write0x0Enable decompression. 0=no decompression; 1=decompression may be enabled by BD
Enable_Out_of_Order 3rwNormal read/write0x0Enable out-of-order mode. 0=in-order mode
Reset 1rwNormal read/write0x0Reset S2MM0
Reserved 0rwNormal read/write0x0Reserved (previously Enable)