| Field Name | Bits | Type | Reset Value | Description |
|---|
| DMA_Adaptive_Clock_Gate | 5 | rwNormal read/write | 0x1 | Enable adaptive clock gate in DMA when it is idle |
| Stream_Switch_Adaptive_Clock_Gate | 4 | rwNormal read/write | 0x1 | Enable adaptive clock gate in stream switch when it has been idle for X cycles |
| Core_Module_Clock_Enable | 2 | rwNormal read/write | 0x1 | Enable the clock to Core Module |
| Memory_Module_Clock_Enable | 1 | rwNormal read/write | 0x1 | Enable the clock to Memory Module |
| Stream_Switch_Clock_Enable | 0 | rwNormal read/write | 0x1 | Enable the clock to Stream Switch |