Getting Started

Getting Started

Introduction
 Power Estimation and Analysis Using Vivado
 Using the AMD Power Estimator (XPE)
 Power Optimization Using Vivado
 How to Estimate UltraScale Device Power using AMD Power Estimator (XPE)
 UG997 - Vivado Design Suite Tutorial: Power Analysis and Optimization
 Power Efficiency - Product Page
Key Concepts
 UG907 - Seven Steps to an Accurate Worst-Case Power Estimation Using AMD Power Estimator
 XAPP790 - Analysis of Power Savings using Intelligent Clock Gating
 XAPP555 - Lowering Power using the Voltage Identification Bit
 WP389 - Lowering Power at 28 nm with AMD 7 Series FPGAs
 UG907 - Achieving an Accurate Power Analysis Using Vivado Report Power
Download XPE
 AMD Power Estimator Web Page with XPE downloads

Additional Learning Materials

Additional Learning Materials

Videos
 FPGA Power Requirements Overview
 FPGA Power Management Design Techniques
 FPGA Power Management Software Options
 FPGA Power Management HDL Coding Techniques
 XPE For Early Thermal Analysis
 Accurate Logic & Signal Power Estimation In XPE
User Guides
 UG440 - AMD Power Estimator User Guide
 UG907 - Vivado Design Suite User Guide: Power Analysis and Optimization
 UG112 - Device Package User Guide
White Papers
 WP411 - Simulating FPGA Power Integrity Using S-Parameter Models
Training
 Designing FPGAs Using the Vivado Design Suite

Support Resources

Support Resources

Frequently Asked Questions (FAQ)
 AR22932 - How Do I Enable Macros in Excel?
 AR55595 - How Do I Generate SAIF for Accurate Power Analysis?
 AR53544 - How Do I Generate SAIF for Power Analysis from ModelSim?
 AR67233 - How Do I Estimate PCIe Power for Gen3x16 and Gen4x8 in XPE 2016.1?
Solution Center and Known Issues
 AR55087 - Vivado Power Solution Center
 AR55091 - Vivado Power Solution Center - Known Issues
 AR55090 - Vivado Power Solution Center - Design Advisory
 AR55089 - Vivado Power Solution Center - Design & Debug Assistant
Vivado Design Suite Product PageDesign Hubs Home Page