Stream_Switch_Event_Port_Selection_1 (CORE

Stream_Switch_Event_Port_Selection_1 (CORE_MODULE) Register Description

Register Name	Stream_Switch_Event_Port_Selection_1
Offset Address	0x000003FF04
Absolute Address	The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row.
Width	32
Type	rwNormal read/write
Reset Value	0x00000000
Description	Select Stream Switch Ports for event generation

Field Name	Bits	Type	Reset Value	Description
Port_7_Master_Slave	29	rwNormal read/write	0x0	Select master or slave for port 7 event generation, 1=master
Port_7_ID	28:24	rwNormal read/write	0x0	Select port ID for port 7 event generation
Port_6_Master_Slave	21	rwNormal read/write	0x0	Select master or slave for port 6 event generation, 1=master
Port_6_ID	20:16	rwNormal read/write	0x0	Select port ID for port 6 event generation
Port_5_Master_Slave	13	rwNormal read/write	0x0	Select master or slave for port 5 event generation, 1=master
Port_5_ID	12:8	rwNormal read/write	0x0	Select port ID for port 5 event generation
Port_4_Master_Slave	5	rwNormal read/write	0x0	Select master or slave for port 4 event generation, 1=master
Port_4_ID	4:0	rwNormal read/write	0x0	Select port ID for port 4 event generation