| Register Name | DMA_BD1_3 |
|---|---|
| Offset Address | 0x000001D02C |
| Absolute Address |
The notation for the AI Engine register addresses is aie_[pl]/[core]/[memory]/[noc]_module_column_row. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | DMA BD1 3 |
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| D1_Wrap | 28:21 | rwNormal read/write | 0 | Wrap after this many dim1 steps and increment dim2 by a step. 0=do not wrap |
| D0_Wrap | 20:13 | rwNormal read/write | 0 | Wrap after this many dim0 steps (32-bit words) and increment dim1 by a step. 0=do not wrap |
| D2_Stepsize | 12:0 | rwNormal read/write | 0 | Offset each step for dimension 3 (number of 32-bit words) (actual -1); Range [1:8k] |